The present invention relates to integrated circuits, and more particularly to decoupling capacitors employed within integrated circuits and to methods for forming such decoupling capacitors.
Complementary metal-oxide-semiconductor (CMOS) circuitry formed on silicon-on-insulator (SOI) substrates offers higher performance than CMOS circuitry formed on bulk substrates due to the lower junction capacitances of SOI-based devices and the increased switching speed associated therewith. This performance advantage is enabled by dielectrically isolating active circuits from the bulk substrate (e.g., via a buried oxide layer).
While the use of SOI substrates improves the switching characteristics of CMOS circuitry, the use of SOI substrates is not entirely beneficial. For example, compared to devices formed on bulk substrates, SOI-based devices have higher diode resistances, reduced thermal conduction dissipation and very low on-chip decoupling capacitances between power supply rails and ground. Electrostatic discharge (ESD) protection thereby is degraded for SOI-based devices (e.g., due to high diode resistances and poor thermal conduction), and on-chip noise and input/output (I/O) noise is larger for SOI-based devices (e.g., due to low on-chip decoupling capacitances).
ESD protection for SOI-based CMOS technology is described, for example, in U.S. patent application Ser. No. 09/334,078, filed Jun. 16, 1999 (IBM Docket No. BU9-98-213). However, a need for high capacitance, SOI-based decoupling capacitors remains.
To overcome the needs of the prior art, a novel decoupling capacitor and methods for forming the same are provided. The novel decoupling capacitor has a highly doped body region that decreases the RC time constant of the capacitor (increasing the switching speed of a device employing the decoupling capacitor), and that allows the decoupling capacitor to be formed in a small geometric area (increasing circuit density).
In a first aspect of the invention, the decoupling capacitor is formed during a process for forming first and second type FETs (e.g., p-channel and n-channel FETs) on a common substrate that comprises a plurality of implant steps for doping channels and diffusions of the first and second type FETs. To form the decoupling capacitor, an epitaxial layer is formed over a channel region of at least one of the first type FETs after a channel dopant is implanted into the channel region of the at least one of the first type FETs. Thereafter, a gate oxide layer is formed over the epitaxial layer, and a gate is formed over the gate oxide layer. A diffusion implant step for the first type FETs on the common substrate is blocked from the at least one of the first type FETS; and a diffusion implant step for the second type FETs on the common substrate is not blocked from the at least one of the first type FETs. The channel region together with diffusion regions of the at least one of the first type FETs forms one terminal of the capacitor, and the gate forms another terminal of the capacitor.
In a second aspect of the invention, a method is provided for forming the novel decoupling capacitor that includes the steps of forming a mandrel layer on a substrate, including forming openings in the mandrel layer and disposing a first type dopant into the substrate through the openings. Thereafter, an epitaxial layer is formed in the openings on the substrate, an insulator layer is formed in the openings on the epitaxial layer and a gate is formed in the openings on the insulator layer. The mandrel layer is removed and the first type dopant is disposed into the substrate abutting the first type dopant in the substrate that was disposed through the openings. During this step the first type dopant is disposed into the gate. The substrate having the first type dopant comprises one terminal of the capacitor and the gate comprises another terminal of the capacitor.
Other objects, features and advantages of the present invention will become more fully apparent from the following detailed description of the preferred embodiments, the appended claims and the accompanying drawings.